The output of an AND gate is HIGH when ________. A) one input ...

[meagbuch]

The output of an AND gate is HIGH when ________.
 
  A) one input is HIGH and the remaining inputs are LOW
  B) all inputs are LOW
  C) all inputs are HIGH
  D) one input is LOW and the remaining inputs are HIGH

Question 2

For a negative-logic pulse, the leading edge is the ________.
 
  A) LOW-to-HIGH transition B) negative-going edge
  C) positive-going edge D) rising edge

[LegendaryAnswers]

Answer to Question 1

C

Answer to Question 2

B

[meagbuch]

Thanks for the timely response, appreciate it

[dantucker]

Gracias!