Author Question: Asynchronous down counters: A) require that the LSB flip-flop change states with each input clock ... (Read 162 times)

misspop · **on:** Jul 28, 2018

Asynchronous down counters:

A) require that the LSB flip-flop change states with each input clock pulse the same as an up counter.
B) require that the MSB flip-flop change states with each input clock pulse the same as an up counter.
C) require that the MSB and LSB flip-flops change states with each input clock pulse.
D) require that each flip-flop change states with each input clock pulse.

Question 2

The decoding gates for asynchronous counters may have glitches on their outputs because:

A) the flip-flops all change states at the same time.
B) the flip-flops change states one at a time; therefore no change for producing a glitch will ever exist.
C) the flip-flops all change states at the same time but tpd may vary slightly for each FF thereby producing glitches.
D) the flip-flops change states one at a time and erroneous counts may occur prior to the time all FF outputs have stabilized.