[Answered] A positive level-triggered flip-flop will only accept inputs when the clock A) is HIGH. B) ...

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Author Question: A positive level-triggered flip-flop will only accept inputs when the clock A) is HIGH. B) ... (Read 62 times)

Kikoku

Hero Member
Posts: 540

on: Jul 28, 2018

A positive level-triggered flip-flop will only accept inputs when the clock

A) is HIGH. B) changes from LOW to HIGH.
C) changes from HIGH to LOW. D) is LOW.

Question 2

A Sallen-Key two-pole low-pass filter has an R1 of 12 k, an R2 of 12 k, a C1 of 0.1 F, and a C2 of 0.056 F. The circuit's cutoff frequency is

A) 1.97 kHz B) 197 Hz C) 200 kHz D) 177 Hz

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Marked as best answer by a Subject Expert

choc0chan

Sr. Member
Posts: 362

Reply #1 on: Jul 28, 2018

Answer to Question 1

A

Answer to Question 2

D

Kikoku

Hero Member
Posts: 540

Reply #2 on: Jul 28, 2018

choc0chan

Sr. Member
Posts: 362

Reply #3 on: Jul 28, 2018

You're welcome

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