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Author Question: Generally, an increase in load capacitance to a MOS logic output results in: A) a decrease in ... (Read 75 times)

formula1

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on: Jul 27, 2018
Generally, an increase in load capacitance to a MOS logic output results in:
 
  A) a decrease in fan-out capability. B) a decrease in switching time.
  C) an increase in switching time. D) Both A and B

Question 2

In a digital system, three or four numbering systems may be in use at the same time.
 
  Indicate whether the statement is true or false


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TINA

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Reply #1 on: Jul 27, 2018
Answer to Question 1

C

Answer to Question 2

TRUE


formula1

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Reply #2 on: Jul 27, 2018
Thanks


TINA

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Reply #3 on: Jul 27, 2018
Welcome :)


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