[Answered] Generally, an increase in load capacitance to a MOS logic output results in: A) a decrease in ...

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formula1

Hero Member
Posts: 666

on: Jul 27, 2018

Generally, an increase in load capacitance to a MOS logic output results in:

A) a decrease in fan-out capability. B) a decrease in switching time.
C) an increase in switching time. D) Both A and B

Question 2

In a digital system, three or four numbering systems may be in use at the same time.

Indicate whether the statement is true or false

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TINA

Sr. Member
Posts: 336

Reply #1 on: Jul 27, 2018

Answer to Question 1

C

Answer to Question 2

TRUE

formula1

Hero Member
Posts: 666

Reply #2 on: Jul 27, 2018

Thanks

TINA

Sr. Member
Posts: 336

Reply #3 on: Jul 27, 2018

Welcome

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