Karnaugh mapping is the preferred method to design logic circuits ...

[jhjkgdfhk]

Karnaugh mapping is the preferred method to design logic circuits from an excitation diagram. Sum of product expressions can be formed directly from excitation tables. For J = X; K = X conditions:
 
  A) do not form SOP expressions for X inputs. B) X must be treated as a 0.
  C) X must be treated as a 1. D) any of the above

Question 2

Which of the following is TRUE regarding asynchronous counters?
 
  A) less circuitry required than synchronous counters
  B) J and K inputs are permanently high on LSB flip-flop
  C) J and K inputs must be decoded on the LSB
  D) propagation delay is increased

[tofugiraffe]

Answer to Question 1

D

Answer to Question 2

B

[jhjkgdfhk]

TY

[tofugiraffe]

You're welcome