The asynchronous transfer of data between J-K storage registers ...

[P68T]

The asynchronous transfer of data between J-K storage registers can easily be accomplished using the:
 
  A) PRESET and CLEAR inputs only. B) Clock and the input J-K control signals.
  C) Clock with the PRESET and CLEAR inputs. D) J-K control signals only.

Question 2

Which of the following best describes the normal logical operation of a NOR gate latch?
 
  A) Inactive SET and CLEAR inputs = 1, active SET input = 0, active CLEAR input = 1
  B) Inactive SET and CLEAR inputs = 1, active SET input = 1, active CLEAR input = 0
  C) Inactive SET and CLEAR inputs = 0, active SET or CLEAR inputs = 1
  D) Inactive SET and CLEAR inputs = 0, active SET or CLEAR inputs = 0

[CourtneyCNorton]

Answer to Question 1

A

Answer to Question 2

C

[P68T]

Gracias!

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