Select the response that best defines the use of the Master Reset ...

[deesands]

Select the response that best defines the use of the Master Reset (MR) on typical counter ICs.
 
  A) The MR is a synchronous active HIGH input that resets the counter to 00002 on the next input clock pulse.
  B) The MR is an asynchronous active HIGH input that resets the counter to 00002 on the next clock pulse input.
  C) The MR is a synchronous active HIGH J-K input that resets the counter to 00002.
  D) The MR is an asynchronous active HIGH input that resets the counter to the 00002 state.

Question 2

A MOD-8 asynchronous counter has a worst case propagation delay of tphl = 37 ns. The maximum input clock frequency for this counter would be:
 
  A) 5.405 MHz B) 13.514 MHz C) 9.009 MHz D) 6.756 MHz

[chloejackso]

Answer to Question 1

D

Answer to Question 2

C

[deesands]

TY

[chloejackso]

You're welcome