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Author Question: A 74164 8-bit SIPO is initially loaded with 10011100. After one clock pulse, which data will the ... (Read 53 times)

Alainaaa8

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on: Jul 28, 2018
A 74164 8-bit SIPO is initially loaded with 10011100. After one clock pulse, which data will the shift register contain if the serial input is HIGH?
 
  A) 10011101 B) 11001001 C) 10011100 D) 11001110

Question 2

In VHDL how do you define whether a shift register is a shift-left or shift-right register?
 
  What will be an ideal response?


kalskdjl1212

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Reply #1 on: Jul 28, 2018
Answer to Question 1

D

Answer to Question 2

You change the order of the assignment statements in the architecture section.


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