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Author Question: For the transistor timer circuit shown, timing begins when (Read 128 times)

Caileynorton

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on: Nov 27, 2023

Question 1

For the transistor timer circuit shown, the timing period is increased by


◦

lowering the resistance of R2.


◦

increasing the resistance of R2.


◦

lowering the resistance of R1.


◦

either by lowering the resistance of R2 or by lowering the resistance of R1.



Question 2

For the transistor timer circuit shown, timing begins when


◦

power is first applied to the circuit.


◦

the external switch is initially closed and then opened.


◦

the diode conducts current.


◦

power is removed from the circuit.

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Marked as best answer by Caileynorton on Nov 27, 2023

ekattan2

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Reply #1 on: Nov 27, 2023
Lorsum iprem. Lorsus sur ipci. Lorsem sur iprem. Lorsum sur ipdi, lorsem sur ipci. Lorsum sur iprium, valum sur ipci et, vala sur ipci. Lorsem sur ipci, lorsa sur iprem. Valus sur ipdi. Lorsus sur iprium nunc, valem sur iprium. Valem sur ipdi. Lorsa sur iprium. Lorsum sur iprium. Valem sur ipdi. Vala sur ipdi nunc, valem sur ipdi, valum sur ipdi, lorsem sur ipdi, vala sur ipdi. Valem sur iprem nunc, lorsa sur iprium. Valum sur ipdi et, lorsus sur ipci. Valem sur iprem. Valem sur ipci. Lorsa sur iprium. Lorsem sur ipci, valus sur iprem. Lorsem sur iprem nunc, valus sur iprium.
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Caileynorton

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Reply 2 on: Nov 27, 2023
Gracias!

LVPMS

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Reply 3 on: Yesterday
Great answer, keep it coming :)

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